Is there a rational explanation on why there seems to be a HN article answering the weirdest questions i had in my mind just a few days ago ?
Only yesterday i wondered how did CPU performed division. I didn't ask or type anything about it. It was just in my mind. And now this.
Are we part of a collective mind ? Do social networks algorithms shape society that deeply that we all end up having about the same random thoughts ?
Yes, one can only hope Ken Shirriff eventually happens to come across one of those models, but I guess they are probably very rare these days.
Besides the multiplication, the 386 had quite a number of teething problems[1], including occasionally broken addressing modes, unrecoverable exceptions, virtual address resolution bugs around the 2G mark, etc...
A while ago, there was also an article posted here that analyzed the inner workings of the Windows/386 loader[2]. Interestingly, Windows simply checks a pair of instruction (XBTS/IBTS) that early 386 steppings had, but was later removed, raising an invalid opcode exception instead.
Raymond Chen also wrote a blog post describing a few workarounds that Windows 95 had implemented[3].
From what I've read, the 386 multiplication bug was a semi-analog problem, so the fix was probably making a transistor larger. As a result, it would probably be hard to find the fix on the die and wouldn't be as interesting as, say, the Pentium division bug.
This reminds me of a problem from undergrad computer architecture: how can you validate the multiplier without checking all possible N squared inputs? (Which would take forever.)
I read later in a TI DRAM report about which bit pairs to exercise, based on proximity in silicon layout, to verify the part. I suppose something like that to stress-test the ALU.
The 80186 and NEC Vxx chips - and of course also the 286 - could already do mul/div in one cycle per bit (+ some overhead for the microcode). What they didn't have was the early-out optimization.
The three-operand form of IMUL also already existed on those processors.
>This wasn't just an incremental upgrade—it was the foundation that would carry the PC architecture for decades to come.
Probably not; this point is well justified by both theory and practice. Supporting suitably larger operands is indeed what naturally comes following the increase of computation demands.
One point I do differ from the author is that register width don't necessarily correlate with the size of address space. Even 8bit machines can address a large space by splitting apart the logical address and using multiple registers. Likewise, having a wide register does not imply the same address width.
I see it all over the article. Occasionally there is a more human voice. (See that single dash? The rare use of "I"?) The overall structure resembles a AI response to "explain this code snippet" prompt.
Is there a rational explanation on why there seems to be a HN article answering the weirdest questions i had in my mind just a few days ago ? Only yesterday i wondered how did CPU performed division. I didn't ask or type anything about it. It was just in my mind. And now this.
Are we part of a collective mind ? Do social networks algorithms shape society that deeply that we all end up having about the same random thoughts ?
This is really scary in a way.
Not sure if it has a name but often there’s a trend of “one thing leads to another” related articles on the HN front page.
Yesterday there was something similar that might have planted a seed in your mind like it did for other people.
https://news.ycombinator.com/item?id=46735133
Right. Or it could be frequency illusion. Once you become aware of something, it appears to be more frequent:
https://en.wikipedia.org/wiki/Frequency_illusion
or probably just some kind of preference/selection bias.
You own a red Mercedes now and suddenly you see only red Mercedes' on the streets.
The mind data-mines.
No discussion of these instructions on the 386 would be complete without mentioning that early revisions had a bug in the 32-bit multiply: https://retrocomputing.stackexchange.com/questions/17803/int...
I wonder if anyone outside of Intel has discovered the actual bug in the circuitry yet.
Yes, one can only hope Ken Shirriff eventually happens to come across one of those models, but I guess they are probably very rare these days.
Besides the multiplication, the 386 had quite a number of teething problems[1], including occasionally broken addressing modes, unrecoverable exceptions, virtual address resolution bugs around the 2G mark, etc...
A while ago, there was also an article posted here that analyzed the inner workings of the Windows/386 loader[2]. Interestingly, Windows simply checks a pair of instruction (XBTS/IBTS) that early 386 steppings had, but was later removed, raising an invalid opcode exception instead.
Raymond Chen also wrote a blog post describing a few workarounds that Windows 95 had implemented[3].
[1] https://www.pcjs.org/documents/manuals/intel/80386/
[2] https://virtuallyfun.com/2025/09/06/unauthorized-windows-386...
[3] https://devblogs.microsoft.com/oldnewthing/20110112-00/?p=11...
From what I've read, the 386 multiplication bug was a semi-analog problem, so the fix was probably making a transistor larger. As a result, it would probably be hard to find the fix on the die and wouldn't be as interesting as, say, the Pentium division bug.
This reminds me of a problem from undergrad computer architecture: how can you validate the multiplier without checking all possible N squared inputs? (Which would take forever.)
I read later in a TI DRAM report about which bit pairs to exercise, based on proximity in silicon layout, to verify the part. I suppose something like that to stress-test the ALU.
The 80186 and NEC Vxx chips - and of course also the 286 - could already do mul/div in one cycle per bit (+ some overhead for the microcode). What they didn't have was the early-out optimization.
The three-operand form of IMUL also already existed on those processors.
>This wasn't just an incremental upgrade—it was the foundation that would carry the PC architecture for decades to come.
AI?
> AI?
Probably not; this point is well justified by both theory and practice. Supporting suitably larger operands is indeed what naturally comes following the increase of computation demands.
One point I do differ from the author is that register width don't necessarily correlate with the size of address space. Even 8bit machines can address a large space by splitting apart the logical address and using multiple registers. Likewise, having a wide register does not imply the same address width.
The writing style appears to be AI.
I see it all over the article. Occasionally there is a more human voice. (See that single dash? The rare use of "I"?) The overall structure resembles a AI response to "explain this code snippet" prompt.
Excellent work. Thank you! Your 486 FPGA project looks pretty neat too.